.TH "halconf.h" 3 "Wed Sep 16 2015" "Doxygen" \" -*- nroff -*-
.ad l
.nh
.SH NAME
halconf.h \- 
.SH SYNOPSIS
.br
.PP
\fC#include 'mcuconf\&.h'\fP
.br

.SS "Macros"

.in +1c
.ti -1c
.RI "#define \fBHAL_USE_TM\fP   FALSE"
.br
.RI "\fIEnables the TM subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_PAL\fP   TRUE"
.br
.RI "\fIEnables the PAL subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_ADC\fP   FALSE"
.br
.RI "\fIEnables the ADC subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_CAN\fP   TRUE"
.br
.RI "\fIEnables the CAN subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_EXT\fP   FALSE"
.br
.RI "\fIEnables the EXT subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_GPT\fP   FALSE"
.br
.RI "\fIEnables the GPT subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_I2C\fP   TRUE"
.br
.RI "\fIEnables the I2C subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_ICU\fP   TRUE"
.br
.RI "\fIEnables the ICU subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_MAC\fP   FALSE"
.br
.RI "\fIEnables the MAC subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_MMC_SPI\fP   FALSE"
.br
.RI "\fIEnables the MMC_SPI subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_PWM\fP   FALSE"
.br
.RI "\fIEnables the PWM subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_RTC\fP   FALSE"
.br
.RI "\fIEnables the RTC subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_SDC\fP   FALSE"
.br
.RI "\fIEnables the SDC subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_SERIAL\fP   FALSE"
.br
.RI "\fIEnables the SERIAL subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_SERIAL_USB\fP   TRUE"
.br
.RI "\fIEnables the SERIAL over USB subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_SPI\fP   FALSE"
.br
.RI "\fIEnables the SPI subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_UART\fP   TRUE"
.br
.RI "\fIEnables the UART subsystem\&. \fP"
.ti -1c
.RI "#define \fBHAL_USE_USB\fP   TRUE"
.br
.RI "\fIEnables the USB subsystem\&. \fP"
.ti -1c
.RI "#define \fBADC_USE_WAIT\fP   TRUE"
.br
.RI "\fIEnables synchronous APIs\&. \fP"
.ti -1c
.RI "#define \fBADC_USE_MUTUAL_EXCLUSION\fP   TRUE"
.br
.RI "\fIEnables the \fCadcAcquireBus()\fP and \fCadcReleaseBus()\fP APIs\&. \fP"
.ti -1c
.RI "#define \fBCAN_USE_SLEEP_MODE\fP   TRUE"
.br
.RI "\fISleep mode related APIs inclusion switch\&. \fP"
.ti -1c
.RI "#define \fBI2C_USE_MUTUAL_EXCLUSION\fP   TRUE"
.br
.RI "\fIEnables the mutual exclusion APIs on the I2C bus\&. \fP"
.ti -1c
.RI "#define \fBMAC_USE_EVENTS\fP   TRUE"
.br
.RI "\fIEnables an event sources for incoming packets\&. \fP"
.ti -1c
.RI "#define \fBMMC_SECTOR_SIZE\fP   512"
.br
.RI "\fIBlock size for MMC transfers\&. \fP"
.ti -1c
.RI "#define \fBMMC_NICE_WAITING\fP   TRUE"
.br
.RI "\fIDelays insertions\&. \fP"
.ti -1c
.RI "#define \fBMMC_POLLING_INTERVAL\fP   10"
.br
.RI "\fINumber of positive insertion queries before generating the insertion event\&. \fP"
.ti -1c
.RI "#define \fBMMC_POLLING_DELAY\fP   10"
.br
.RI "\fIInterval, in milliseconds, between insertion queries\&. \fP"
.ti -1c
.RI "#define \fBMMC_USE_SPI_POLLING\fP   TRUE"
.br
.RI "\fIUses the SPI polled API for small data transfers\&. \fP"
.ti -1c
.RI "#define \fBSDC_INIT_RETRY\fP   100"
.br
.RI "\fINumber of initialization attempts before rejecting the card\&. \fP"
.ti -1c
.RI "#define \fBSDC_MMC_SUPPORT\fP   FALSE"
.br
.RI "\fIInclude support for MMC cards\&. \fP"
.ti -1c
.RI "#define \fBSDC_NICE_WAITING\fP   TRUE"
.br
.RI "\fIDelays insertions\&. \fP"
.ti -1c
.RI "#define \fBSERIAL_DEFAULT_BITRATE\fP   38400"
.br
.RI "\fIDefault bit rate\&. \fP"
.ti -1c
.RI "#define \fBSERIAL_BUFFERS_SIZE\fP   16"
.br
.RI "\fISerial buffers size\&. \fP"
.ti -1c
.RI "#define \fBSPI_USE_WAIT\fP   TRUE"
.br
.RI "\fIEnables synchronous APIs\&. \fP"
.ti -1c
.RI "#define \fBSPI_USE_MUTUAL_EXCLUSION\fP   TRUE"
.br
.RI "\fIEnables the \fCspiAcquireBus()\fP and \fCspiReleaseBus()\fP APIs\&. \fP"
.in -1c
.SH "Author"
.PP 
Generated automatically by Doxygen from the source code\&.
